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PD - 96030
HEXFET(R) Power MOSFET
l l l l l l l l
IRF9540NSPBF IRF9540NLPbF
VDSS = -100V RDS(on) = 117m
Advanced Process Technology Ultra Low On-Resistance 150C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Some Parameters are Different from IRF9540NS/L P-Channel Lead-Free
D
G S
ID = -23A
D
Description Features of this design are a 150C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in a wide variety of other applications.
D
G
D
S G
D
S
D2Pak IRF9540NSPBF
G D
TO-262 IRF9540NLPbF
S
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current
Gate
Drain
Max.
-23 -14 -92 3.1 110 0.9 20 84 -14 11 -13 -55 to + 150 300 (1.6mm from case )
Source
Units
A
c
Maximum Power Dissipation Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current
W W/C V mJ A mJ V/ns C
c
d
Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and
c e
Storage Temperature Range Soldering Temperature, for 10 seconds
Thermal Resistance
Parameter
RJC Junction-to-Case Junction-to-Ambient (PCB Mount, steady state) RJA
Typ.
Max.
1.1 40
Units
C/W
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g
--- ---
1
09/30/05
IRF9540NS/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS VDSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units
-100 --- --- -2.0 5.6 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- -0.11 --- --- --- --- --- --- --- 73 13 38 13 64 40 45 4.5 7.5 1450 430 230 --- --- 117 -4.0 --- -50 -250 100 -100 110 20 57 --- --- --- --- --- --- --- --- --- pF nH ns nC nA V m V S A
Conditions
VGS = 0V, ID = -250A VGS = -10V, ID = -14A VDS = -50V, ID = -14A VDS = -100V, VGS = 0V VDS = -80V, VGS = 0V, TJ = 125C VGS = -20V VGS = 20V ID = -14A VDS = -80V VGS = -10V VDD = -50V ID = -14A RG = 5.1 VGS = -10V
V/C Reference to 25C, ID = -1mA VDS = VGS, ID = -250A
f
f f
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = -25V = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time --- --- --- --- 140 890 -1.6 210 1340 V ns nC
Min. Typ. Max. Units
--- --- --- --- -23 A -92
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = -14A, VGS = 0V di/dt = -100A/s
TJ = 25C, IF = -14A, VDD = -25V
f
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11) Starting TJ = 25C, L = 0.88mH RG = 25, IAS = -14A. (See Figure 12) ISD -14A, di/dt -620A/s, VDD V(BR)DSS, TJ 150C.
Pulse width 300s; duty cycle 2%. When mounted on 1" square PCB (FR-4or G-10
Material). For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRF9540NS/LPbF
1000
TOP VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V -4.5V
1000
TOP VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V -4.5V
-ID, Drain-to-Source Current (A)
100
BOTTOM
-ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
1
-4.5V
1
-4.5V
60s PULSE WIDTH
Tj = 25C 0.1 0.1 1 10 100 -VDS, Drain-to-Source Voltage (V) 0.1 0.1 1
60s PULSE WIDTH
Tj = 150C 10 100
-VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
TJ = 25C
-ID, Drain-to-Source Current (A)
TJ = 150C 10
ID = -14A VGS = -10V
1.5
1
1.0
VDS = -50V 0.1 2 4 6 8 10
60s PULSE WIDTH 12 14
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
-VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
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Fig 4. Normalized On-Resistance vs. Temperature
3
IRF9540NS/LPbF
10000
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20 ID= -14A
-VGS, Gate-to-Source Voltage (V)
16
C, Capacitance(pF)
VDS = -80V VDS = -50V VDS = -20V
Ciss 1000 Coss Crss
12
8
4
100 1 10 -VDS , Drain-to-Source Voltage (V) 100
0 0 20 40 60 80 100 120 QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
100
1000
-ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS (on)
-ISD , Reverse Drain Current (A)
TJ = 150C 10
100
10
100sec 1msec
1
TJ = 25C
1 Tc = 25C Tj = 150C Single Pulse 0.1 1 10
10msec
VGS = 0V 0.1 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -VSD , Source-to-Drain Voltage (V)
100
1000
-VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF9540NS/LPbF
VDS RD
24
RG
VGS
D.U.T.
+
20
-ID, Drain Current (A)
-10V
16 12 8
VGS
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
td(on) tr t d(off) tf
4 0 25 50 75 100 125 150
10%
90% VDS
TC , Case Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
10
Fig 10b. Switching Time Waveforms
Thermal Response ( Z thJC )
1
D = 0.50 0.20
0.1
0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE )
J J 1 1
R1 R1 2
R2 R2
R3 R3 C 3
Ri (C/W)
0.1737838 0.0000610 0.4335992 0.0019590 0.4921007 0.0260060
2
3
0.01
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.0001 0.001 0.01 0.1
0.001 1E-006 1E-005
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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-
VDD
i (sec)
5
IRF9540NS/LPbF
VDS
L
350
EAS , Single Pulse Avalanche Energy (mJ)
RG
D.U.T
IAS
-20V
DRIVER
0.01
VDD A
300 250 200 150 100 50 0 25 50 75
tp
ID -6.7A -9.6A BOTTOM -14A TOP
15V
Fig 12a. Unclamped Inductive Test Circuit
I AS
100
125
150
Starting TJ , Junction Temperature (C)
tp V(BR)DSS
Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
50K 12V .2F .3F
VG
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 14a. Basic Gate Charge Waveform
Fig 14b. Gate Charge Test Circuit
6
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+
QGS
QGD
D.U.T.
-
-10V
VDS
IRF9540NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ VDD
*
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive P.W. Period D=
P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ ISD]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 15. For P-Channel HEXFETS
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7
D2Pak Package Outline
IRF9540NS/LPbF
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN THE AS S EMBLY LINE "L" INTERNAT IONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
OR
INT ERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER F530S DATE CODE P = DES IGNAT ES LEAD - FREE PRODUCT (OPT IONAL) YEAR 0 = 2000 WEEK 02 A = AS S EMBLY S IT E CODE
8
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IRF9540NS/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" Note: "P" in assembly line pos ition indicates "Lead-Free" INTERNATIONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INT ERNATIONAL RECT IF IER LOGO AS S EMBLY LOT CODE PART NUMBER DATE CODE P = DES IGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S ITE CODE
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9
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
IRF9540NS/LPbF
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 09/05
10
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Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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